Voltage regulators (VREG) play a very important role in modern electronics. Practically all systems, irrespective of their type (analog, digital, or mixed) require a supply.
The specifications for the supply voltage of complex systems become very stringent in regard to numerous factors, such as the level of precision of the voltage, the current-generation capacity, the dynamic response, and so forth. These specifications must be met by an adequate VREG device.
The absolute value of the regulated voltage principally depends upon the internal reference of the voltage generator (VREF). The majority of the devices currently developed and marketed are based upon the bandgap-reference (BGR) principle. This approach is currently used in a wide range of voltage regulators.
The bandgap implementation is relatively simple, can be applied practically to any technology, and the electrical parameters are able to meet the majority of current requirements.
On the other hand, if a few electrical parameters are pushed to the extreme, the bandgap implementation may no longer be satisfactory for some applications with particularly stringent requirements and hence can no longer be used.
As has been the, for proper operation, all electronic products require at least one reference voltage. The values of the reference voltage may be standard values or customized values, and typically in the latter case these values can be defined in the production stage or else be “programmed” and selected in-field during use of the product.
Consequently, the reference-voltage generator is the fundamental block present in all circuits, including completely analog circuits and circuits with mixed signals, such as analog-to-digital converters and digital-to-analog converters, DC-DC converters, regulators, linear low-dropout (LDO) regulators, and current references and comparison voltages in voltage comparators.
The new applications, such as wearable applications, for example, smartwatches or other devices, normally require a very low power supply.
As already mentioned, one of the most widely used and effective reference generators is the so-called bandgap reference. Its name derives from the fact that the voltage supplied at output is proportional to the value of the bandgap energy at zero degrees Kelvin of the semiconductor used (normally silicon is used, which has a bandgap of 1.12 eV at room temperature).
The principle on which bandgap circuits are based, especially for liquid-crystal oscillators (LCOs), may not meet the requirements of ultra-low-power systems.
In particular, the value of the reference voltage depends upon the semiconductor used to obtain the device, and this varies considerably as a function of temperature.
In various embodiments of known solutions, the voltage reference is obtained by adding together two voltages, appropriately weighted, with temperature coefficients opposite to one another. For example, in a bandgap generator, the voltage with negative temperature coefficient (CTAT—Complementary-To-Absolute Temperature) is obtained with a forward-biased diode, whereas the voltage with positive temperature coefficient (PTAT—Proportional-To-Absolute Temperature) is obtained from the voltage difference between two diodes with different ratio of area.
In addition, buffering operations are usually necessary for increasing the driving capacity or for obtaining different voltages (for example, values above the bandgap value Vbg), and high values of resistance (of the order of gigaohms) are necessary in order to obtain a precise trimming voltage (ultra-low-current scale).
However, the use of an ultra-low current leads to numerous disadvantages, such as leakage, difficult start-up conditions, dynamics in the bandgap.
Consequently, in an increasingly greater number of applications, the use of voltage references based upon the (embedded or low-dropout) bandgap principle is not possible on account of the constraints of energy consumption and occupation of area.
A classic way for obtaining what has just been described is illustrated in FIG. 1, which shows a typical architecture of a reference generator that exploits the bandgap principle.
In this embodiment, instead of the diodes mentioned above, two diode-connected bipolar transistors Q1 and Q2 are used. The reference voltage is acquired on the output of an operational amplifier. The bipolar transistors Q1 and Q2 are connected, respectively, to the inverting pin and to the positive pin via the resistances R1, R2, and R3.
These are solutions that are widely adopted and can be transformed in “particular” solutions or customized according to whether vertical or lateral bipolar transistors are present and according to particular design/technological constraints.
These solutions guarantee levels of precision in the region of 2% and current consumption higher than a few microamps (as described in the paper “Low Voltage, Low Power CMOS Bandgap References”, Prof. K. Phang, Department of Electrical and Computer Engineering, University of Toronto).
In some cases, to counteract the process spread, which also derives from the use of resistors, in order to obtain a precise reference voltage also an operation of calibration may be necessary, which must then be stored and uploaded during start-up of the SoC (System-on-Chip), with consequent expenditure of area and additional architectural complications.
Classic bandgap implementations could moreover require addition of a buffer downstream when a current-driving capacity is necessary, or else addition of an operational amplifier in inverting configuration for reaching voltages higher than the bandgap voltage made available by such implementations.
The solution that overcomes these problems hence entails a considerable additional occupation of area, and this becomes a problem for small-sized devices, such as wearable devices.
Furthermore, once again in relation to classic implementations, in these solutions there arise problems linked to the use of passive components such as resistors, and particular attention in the layout stage is required.
The need to use resistors entails a considerable occupation of area, which frequently depends upon the devices present in the design technology.
The particular attention that must be paid in the layout stage for implementing the matching rules for compensating the process spread entails a further occupation of area, with an increase in size of the devices.
In addition, as for the resistors, also the layout of the operational amplifier requires attention in positioning and in implementation of matching for the differential pair and for the current mirrors. This attention is required in order to reduce the systematic offset and the process spread.
By way of example, areas in the region of 0.1 mm2 are typical for these applications in BCD (Bipolar-CMOS-DMOS) technology.
An example of parameter that is very stringent is the quiescent current (IQ), which represents the consumption of the regulator at rest. There are various products on the market that push the level of the quiescent current (IQ) down to around 500 nA in no-load conditions.
This represents the entire current consumption of the voltage regulator, in such a way that it may be considered that the regulator works with approximately 100 nA.
It is possible to provide a device based upon the bandgap principle at this level with satisfactory electrical parameters and a reasonable area of silicon.
The problem could arise if the voltage regulator were to be required to work with a total current IQ of just 20 nA. Even though in theory the device with bandgap principle could work with a biasing current of just a few nanoamps, the fact that it requires resistances having values of the order of gigaohms renders this solution unusable. Also the considerations on the parasitic effects (leakage currents, parasitic capacitances) lead to these devices based on the bandgap principle becoming prohibitive, and other principles have to be contemplated.
Present on the market are multiple solutions for overcoming the limitations referred to above.
In terms of reduction of consumption the most interesting are based upon voltage references contained in non-volatile memory cells.
Inspiration may be drawn from the existing principles used for storing digital information in electrically programmable/erasable non-volatile memory cells (EEPROMs).
Digital information can be stored in a memory cell in the form of electric charge. Consequently, also analog information can be stored in a similar way.
The above idea has already been adopted. For example, the company Intersil uses a memory cell in its products that generate a voltage reference (see, for example, the document entitled Voltage References available at the URL http://www.intersil.com/en/products/data-converters/voltage-references.html).
The memory cell in itself has been produced and manufactured by the company Xicor in 2003, and is known under the name of Floating-Gate-Analog (FGA) cell and described in http://www.businesswire.com/news/home/20030422005199/en/Xicor-Announces-Precision-Voltage-Reference-Technology-Breakthrough.
FIG. 2 shows an analogic non-volatile memory cell, i.e., the principle diagram of an FGA cell marketed by the company Xicor.
The cell uses a floating terminal created between two capacitors, i.e., the external capacitor CE and the gate-to-source capacitor of the MOSFET. The voltage stored in the cell can be programmed via two devices that exploit the tunnelling effect for supplying or removing a charge.
A key factor of the analog cell is its capacity to hold the charge (voltage), which must last throughout the life of the device in worst-case conditions. For this reason, the leakages of all the components around the floating-gate terminal must be minimized.
A possible embodiment of the implementations alternative to the bandgap, is illustrated, for example, in FIG. 3.
FIG. 3 shows the principle diagram of voltage references based upon non-volatile memory (NVM) cells.
The above further solutions are described, for example, in U.S. Pat. No. 7,859,911 B2, filed in the name of the present applicant, in Harrison et al., A CMOS Programmable Analog Memory-Cell Array Using Floating-Gate Circuits, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 48, No. 1, January 2001, pp. 4-11, and in Microchip, MCP1017 Demo Board User's Guide, 2012, 20 pages.